A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming

New technologies present a widely range of challenges in the design of standard-cell libraries, layout generation and validation of macro-blocks. Thus, the development of new tools being able to deal with these challenges is mandatory. This work presents a transistor placement technique using genetic algorithm associated to analytical programming. The genetic algorithm is used to reduce the search space of possible solutions while analytical equations are used to find out the position of each transistor in the layout.